The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 21, 2006
Filed:
Mar. 05, 2004
Hidenori Morimoto, Kashihara, JP;
Hidenori Morimoto, Kashihara, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
The present invention is intended to realize executing high-speed program and erasure by using a NAND type memory cell unit that suits high degree of integration and to realize providing a highly reliable non-volatile semiconductor memory device. A memory cell is made up of a cell transistor (Tij) that is formed on the semiconductor substrate and a variable resistive element (Rij) that is connected between a source and drain terminals of the cell transistor (Tij) and the resistance value of that varies depending on applying a voltage and that is formed of the oxide having a perovskite structure that contains manganese. By connecting a plurality of the memory cells in series, there is formed a memory cell connected-in-series part. Then a memory cell block is prepared by providing a selection transistor (Si) to at least one end of the memory cell connected-in-series part. By disposing more than one such memory cell block, there is constructed a memory cell array.