The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 21, 2006
Filed:
Dec. 23, 2004
Preetam Charan Anand Tadeparthy, Bangalore, IN;
Jomy G Joy, Bangalore, IN;
Gaurav Chandra, Bangalore, IN;
Sumeet Mathur, Bangalore, IN;
Preetam Charan Anand Tadeparthy, Bangalore, IN;
Jomy G Joy, Bangalore, IN;
Gaurav Chandra, Bangalore, IN;
Sumeet Mathur, Bangalore, IN;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A pipeline ADC implemented with both general charge redistribution stages and flip-around charge redistribution stages. Using the flip-around charge redistribution stages leads to reduced power/area consumption, but could lead to accumulation and propagation of errors. general charge redistribution stages are used to control/contain the errors. As a result, the ADC is implemented to achieve an acceptable bit error and power efficiency combination. According to another aspect of the present invention, the first stage is implemented as a flip-around charge redistribution stage (in combination with general charge redistribution stages in subsequent stages) since there is no accumulation of error from prior stages, and implementing the first stage as a flip-around charge redistribution stage gives maximum advantages in power efficiency.