The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 21, 2006
Filed:
Apr. 27, 2004
Akihito Katsura, Katano, JP;
Hiroo Yamamoto, Takatsuki, JP;
Akihito Katsura, Katano, JP;
Hiroo Yamamoto, Takatsuki, JP;
Matsushita Electric Industrial Co., Ltd., Osaka, JP;
Abstract
It is an object of the present invention to achieve a semiconductor device capable of preventing circuit malfunctions caused by noise without decreasing an integration degree of the circuit by making a space between signal interconnections wider and inserting a shield or a shield layer between the signal interconnections. The semiconductor device has a multilayer interconnection structure wherein three or more interconnection layers are stacked on a silicon semiconductor substrate, and comprises: a first signal line which is formed with a (N−1)-th interconnection layer and comprises a latch circuit; a second signal line which is formed with a (N+1)-th interconnection layer and is arranged so as to cross the first signal line or partially overlap thereover; and a power supply interconnection serving as a shield interconnection which is formed with an N-th interconnection layer in a portion directly beneath the first signal line and the second signal line.