The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2006

Filed:

Jun. 07, 2001
Applicants:

Sanjay Ramakrishna Pillay, Austin, TX (US);

Raghunath Krishna Rao, Austin, TX (US);

Hasibur Rahman, Austin, TX (US);

Girish Subramaniam, Austin, TX (US);

Inventors:

Sanjay Ramakrishna Pillay, Austin, TX (US);

Raghunath Krishna Rao, Austin, TX (US);

Hasibur Rahman, Austin, TX (US);

Girish Subramaniam, Austin, TX (US);

Assignee:

Cirrus Logic, INC, Austin, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

An adaptive clock throttleinterfacing a clock generatorgenerating a high speed clock and a processing engineoperating in response to a processing clock. Adaptive clock throttlegenerates a plurality of lower speed clocks from the high speed clock, estimates a duty cycle of the processing engine, and selectively gates one of the lower speed clocks to the processing engine as the processing clock to increase the duty cycle of the processing engine.


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