The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2006

Filed:

Jul. 30, 2002
Applicants:

Shuhua Xiang, Fremont, CA (US);

LI Sha, San Jose, CA (US);

Ping Zhu, San Jose, CA (US);

Hongjun Yuan, San Jose, CA (US);

Wei NI, San Jose, CA (US);

Inventors:

Shuhua Xiang, Fremont, CA (US);

Li Sha, San Jose, CA (US);

Ping Zhu, San Jose, CA (US);

Hongjun Yuan, San Jose, CA (US);

Wei Ni, San Jose, CA (US);

Assignee:

WIS Technologies, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

A processing system includes an arithmetic logic unit (ALU) sub-system that allows data associated with a prior instruction to be preserved for use with a next instruction or subsequent instruction without having to reload the value using an intermediate register. The ALU sub-system includes a pair of ALUs communicatively cross-coupled with a pair of accumulators. The processing system also includes a data selector coupled to the ALU sub-system for use with memory contention prediction. The data selector includes a constant generator that controls storage of data associated with a previous instruction in a bypass element, and a selector to choose between data from a databus element and data stored in the bypass element.


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