The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 07, 2006
Filed:
Jun. 14, 2004
Hidenori Morimoto, Kashihara, JP;
Hidenori Morimoto, Kashihara, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
A nonvolatile semiconductor memory device includes a memory array in which a plurality of memory cells are arranged in a row direction and a column direction, each of the memory cells being formed by connecting one end of a variable resistive element for storing information according to a change in electric resistance caused by an electric stress and a drain of a selection transistor to each other on a semiconductor substrate, a voltage switch circuit for switching among a program voltage, an erase voltage and a read voltage to be applied to the source line and the bit line connected to the memory cell, and a pulse voltage applying circuit. In the state where the program voltage or erase voltage corresponding to the bit line and the source line is applied to the bit line and the source line connected to a memory cell to be programmed or erased in the memory array via the voltage switch circuit, the pulse voltage applying circuit applies a voltage pulse for programming or erasing to the word line connected to the gate electrode of the selection transistor connected to the memory cell.