The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2006

Filed:

Sep. 23, 2004
Applicants:

Richard William Doing, Rochester, MN (US);

Ronald Nick Kalla, Zumbro Falls, MN (US);

Stephen Joseph Schwinn, Lakeville, MN (US);

Edward John Silha, Austin, TX (US);

Kenichi Tsuchiya, Rochester, MN (US);

Inventors:

Richard William Doing, Rochester, MN (US);

Ronald Nick Kalla, Zumbro Falls, MN (US);

Stephen Joseph Schwinn, Lakeville, MN (US);

Edward John Silha, Austin, TX (US);

Kenichi Tsuchiya, Rochester, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A processor supports logical partitioning of hardware resources including real address spaces of a computer system. An ultra-privileged supervisor process, called a hypervisor, regulates the logical partitions and can dynamically re-allocate resources. Preferably, the processor supports hardware multithreading, each thread independently capable of being in either hypervisor, supervisor, or problem state, and is capable of entering hypervisor state only upon occurrence of certain pre-defined events. A logical partition identifier is stored in a processor register, and can be altered by the processor only when in hypervisor state. Certain bus communications contain a logical partition identifier tag, and the processor ignores such communications if the tag does not match its own logical partition identifier in its register.


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