The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 31, 2006
Filed:
Jun. 29, 2004
Won-seok Lee, Seoul, KR;
Kyoung-ho Ha, Seoul, KR;
Joon-seop Kwak, Gyeonggi-do, KR;
Ho-sun Paek, Gyeonggi-do, KR;
Sung-nam Lee, Gyeonggi-do, KR;
Tan Sakong, Gyeonggi-do, KR;
Won-seok Lee, Seoul, KR;
Kyoung-ho Ha, Seoul, KR;
Joon-seop Kwak, Gyeonggi-do, KR;
Ho-sun Paek, Gyeonggi-do, KR;
Sung-nam Lee, Gyeonggi-do, KR;
Tan Sakong, Gyeonggi-do, KR;
Samsung Electronics Co., Ltd., Suwon-si, KR;
Abstract
Provided are a semiconductor device having a superlattice semiconductor layer and a method of fabricating the same. The semiconductor device includes a superlattice semiconductor layer in which first material layers and second material layers formed of different materials are alternately stacked. A plurality holes are formed in the first material layers and the second material layers forming a superlattice structure, and the holes are filled with materials of the adjacent material layers. The provided superlattice structure reduces a driving voltage by transferring charges through the holes in the first material layers and the second material layers while maintaining a predetermined optical confinement characteristic.