The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2006

Filed:

Jun. 13, 2002
Applicants:

Stephen A. Wiley, Arvada, CO (US);

John Schell, Westminster, CO (US);

Christian Cadieux, Louisville, CO (US);

Inventors:

Stephen A. Wiley, Arvada, CO (US);

John Schell, Westminster, CO (US);

Christian Cadieux, Louisville, CO (US);

Assignee:

Sun Microsystems, Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A fault isolation system in a network is disclosed, particularly suited for use in a unidirectional fibre channel arbitrated loop. Information relating to read and write errors occurring on the loop is stored, and fault regions are located by determining areas on the loop downstream of write errors and upstream of read errors. The system may be extended to networks with bidirectional communications by storing directionality information with the detected errors. Command and response error information is not needed to deterministically locate the fault regions. When a given fault region is identified, loop and device diagnostics are executed for that region of the loop to specifically identify the failed components.


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