The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2006

Filed:

May. 29, 2000
Applicants:

Markus Balb, Munich, DE;

Ralf Schedel, Stamberg, DE;

Walter Fiessinger, Taufkirchen, DE;

Inventors:

Markus Balb, Munich, DE;

Ralf Schedel, Stamberg, DE;

Walter Fiessinger, Taufkirchen, DE;

Assignee:

Infineon Technologies AG, München, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A circuit arrangement for a communication system for terminating a plurality of interfaces at a common bus and for generating a synchronization clock for synchronizing the bus is provided. In one aspect, a circuit arrangement for a communication system includes a first multiplexer controlled by a first control signal with a plurality of inputs corresponding to a plurality of transmission lines of the interfaces, a respective phase control unit, preceding each input of the first multiplexer, which derives a respective clock generator signal from a received signal of the corresponding transmission line, where the clock generator signal of one of the transmission lines is switched through as output signal of the first multiplexer in dependence on the first control signal, and a phase locked loop, at the inputs of which the output signal of the first multiplexer and a clock from a clock generator operated with an external crystal oscillator.


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