The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 24, 2006
Filed:
Jul. 01, 2005
Lorenzo Anthony Cividino, Franklin, MA (US);
Dayu Qu, Malden, MA (US);
Lorenzo Anthony Cividino, Franklin, MA (US);
Dayu Qu, Malden, MA (US);
Power-One, Inc., Camarillo, CA (US);
Abstract
A system and method is provided for dynamically controlling output voltage slew rate in a power converter. Preferred embodiments of the present invention operate in accordance with a power converter including at least a slew-rate control lead (a trim lead, a control lead, etc.), an error-amplifier circuit located therein, a slew-rate circuit, and a controller electrically connected to the power converter and adapted to dynamically control the converter's output voltage slew rate through the transmission of a slew-rate signal. In one embodiment of the present invention, the slew-rate circuit is external to the power converter and electrically connected to both a trim lead of the power converter and to the controller. In another embodiment of the present invention, the slew-rate circuit is internal to the power converter and electrically connected to both a control lead of the power converter and to the error-amplifier circuit. In either embodiment, the controller is adapted to transmit a slew-rate signal to the slew-rate-control lead (i.e., the trim lead, the control lead, etc.), where the nature of the slew-rate signal is dependant on the configuration of the slew-rate circuit. For example, if the slew-rate circuit comprises a transistor and/or a capacitor, the slew rate signal may comprise a dynamically adjusted voltage or charge-based signal; if the slew-rate circuit comprises a resistor, the slew-rate signal may comprise a dynamically adjusted current-based signal; or if the slew-rate circuit comprises a digital variable resistor, the slew-rate signal may comprise a dynamically adjusted digital signal.