The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2006

Filed:

Feb. 25, 2003
Applicants:

Yuan-tung Dai, Chung-Li, TW;

Tsung-neng Liao, Taichung Hsien, TW;

Chun-chi Lee, Taipei, TW;

Inventors:

Yuan-Tung Dai, Chung-Li, TW;

Tsung-Neng Liao, Taichung Hsien, TW;

Chun-Chi Lee, Taipei, TW;

Assignee:

Forhouse Corporation, Taichung Hsien, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating on-chip spacers for a TFT panel exposes a photoresist layer on top of the TFT panel using two exposure processes, one through the bottom of the TFT and the other through a mask over the TFT panel. The exposure process through the bottom exposes all photoresist covering windows on the TFT panel and leaves all photoresist corresponding to an opaque grid corresponding a TFT driving circuit. A second exposure process through a mask above the photoresist leaves part of the photoresist in the opaque grid unexposed. The exposed photoresist is removed leaving on-chip spacers only on the opaque grid. Therefore, the on-chip spacers can not affect the display quality and can be easily formed on a high dpi TFT panel.


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