The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 10, 2006
Filed:
Mar. 07, 2002
Katsuya Anzai, Gifu, JP;
Ryoichi Yokoyama, Ohgaki, JP;
Katsuya Anzai, Gifu, JP;
Ryoichi Yokoyama, Ohgaki, JP;
Sanyo Electric Co., Ltd., , JP;
Abstract
On a substrate (), one or more inverter circuits for adjusting delay time are provided between an external clock input section (T, T) to which a clock signal CKHor CKHis externally input and a sampling signal generating circuit (shift register). Of the inverter circuits, only necessary inverter circuits are selected and connected, thereby delaying the sampling timing for a video signal. The connection between the inverter circuit and the signal path is achieved simply by changing a connection line pattern mask in accordance with the number of inverter circuits to be connected, and without changing other manufacturing processes.