The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 2006

Filed:

May. 22, 2002
Applicants:

Ryan Matthew Korzyniowski, Fort Collins, CO (US);

Troy Horst Frerichs, Fort Collins, CO (US);

Inventors:

Ryan Matthew Korzyniowski, Fort Collins, CO (US);

Troy Horst Frerichs, Fort Collins, CO (US);

Assignee:

Agilent Technologies, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A clock driver placement system and method are provided to place clock drivers in a standard cell block. In accordance with one aspect of the invention, a system is provided for placing clock drivers in a standard cell block. The system operates using logic that establishes an initial clock driver placement pattern, and logic that determines a number of clock drivers needed in the standard cell block to comply with a time specification. The system also includes a logic that adds clock drivers to the standard cell block using the initial clock driver placement pattern. In accordance with another aspect of the invention, a method establishes an initial clock driver placement pattern and determines a number of clock drivers needed in the standard cell block to comply with a time specification. Then, the clock drivers are added to the standard cell block using the initial clock driver placement pattern.


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