The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 03, 2006

Filed:

Dec. 08, 2003
Applicants:

Zia Hossain, Tempe, AZ (US);

Shanghui Tu, Phoenix, AZ (US);

Takeshi Ishiguro, Aizuwakamatsu, JP;

Rajesh S. Nair, Chandler, AZ (US);

Inventors:

Zia Hossain, Tempe, AZ (US);

Shanghui Tu, Phoenix, AZ (US);

Takeshi Ishiguro, Aizuwakamatsu, JP;

Rajesh S. Nair, Chandler, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01); H01L 29/94 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment, a lateral FET structure () is formed in a body of semiconductor material (). The structure () includes a plurality non-interdigitated drain regions () that are coupled together with a conductive layer (), and a plurality of source regions () that are coupled together with a different conductive layer (). One or more interlayer dielectrics () separate the two conductive layers (). The individual source regions () are absent small radius fingertip regions.


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