The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2005

Filed:

Nov. 28, 2000
Applicants:

Raymond C. Pang, San Jose, CA (US);

Walter N. Sze, Saratoga, CA (US);

John M. Thendean, Berkeley, CA (US);

Stephen M. Trimberger, San Jose, CA (US);

Jennifer Wong, Fremont, CA (US);

Inventors:

Raymond C. Pang, San Jose, CA (US);

Walter N. Sze, Saratoga, CA (US);

John M. Thendean, Berkeley, CA (US);

Stephen M. Trimberger, San Jose, CA (US);

Jennifer Wong, Fremont, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F012/14 ;
U.S. Cl.
CPC ...
Abstract

It is sometimes desirable to protect a design used in a PLD from being copied. If the design is stored in a different device from the PLD and read into the PLD through a bitstream, the design may be encrypted as it is read into the PLD and decrypted within the PLD before being loaded into configuration memory cells for configuring the PLD. According to the invention, in such a device, a method is provided to prevent the design from being read back from the PLD in its decrypted state if it had been encrypted when loaded into the PLD.


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