The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2005

Filed:

Aug. 15, 2001
Applicants:

Norio Chujo, Tokyo, JP;

Keiichi Yamamoto, Tokyo, JP;

Akio Osaki, Tokyo, JP;

Katsunori Hirano, Tokyo, JP;

Takayuki Nakao, Yokohama, JP;

Tomoaki Shimotsu, Yokohama, JP;

Atsushi Hasegawa, Yokohama, JP;

Tetsuya Aoki, Yokohama, JP;

Takeshi Yamashita, Yokohama, JP;

Inventors:

Norio Chujo, Tokyo, JP;

Keiichi Yamamoto, Tokyo, JP;

Akio Osaki, Tokyo, JP;

Katsunori Hirano, Tokyo, JP;

Takayuki Nakao, Yokohama, JP;

Tomoaki Shimotsu, Yokohama, JP;

Atsushi Hasegawa, Yokohama, JP;

Tetsuya Aoki, Yokohama, JP;

Takeshi Yamashita, Yokohama, JP;

Assignee:

OpNext Japan, Inc., Yokohama, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01J040/14 ; H03D003/24 ; H04B010/06 ;
U.S. Cl.
CPC ...
Abstract

A sample & hold type phase detector is used in a CDR IC and, in jitter transfer bandwidth adjustment, VCO output waveforms 90° out of phase with each other can be inputted to the phase detector, whereby a jitter transfer bandwidth can be calculated by only the measurement of frequency and of a DC voltage and it is possible to make a jitter transfer bandwidth adjustment in DC test for IC.


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