Circuit arrangement for gaining a stereo subcarrier and an rds carrier

Abstract

According to the invention, a circuit arrangement for gaining a 38 kHz stereo subcarrier and a 57 kHz RDS carrier for decoding a stereo signal comprised in a demodulated FM signal and/or an RDS signal comprised in a demodulated FM signal, having a simple structure with only one PLL and particularly only one voltage-controlled oscillator () is characterized in that the arrangement comprises a phase-locked loop with a loop filter (), a voltage-controlled oscillator (), a first phase detector () which receives a reference signal having a reference frequency, and a second phase detector (), which receives the FM signal, the output signal of the voltage-controlled oscillator () being coupled to both phase detectors () in a form divided down by means of dividers (), and the signal fed back to the second phase detector having a frequency of 19 kHz, in that dividers () are provided, by means of which the output signal of the voltage-controlled oscillator () is divided down and which supply the 38 kHz stereo subcarrier and the 57 kHz RDS carrier, in that a frequency control circuit (), which is active only upon start-up of the circuit arrangement, compares the two signals applied to the first phase detector () and controls the voltage-controlled oscillator () in a predetermined frequency range around the reference frequency of the reference signal, in that, after reaching the predetermined frequency range, the frequency control circuit () is deactivated and the output signal of the first phase detector () is coupled to the loop filter (), and in that subsequently, if the demodulated FM signal should comprise a 19 kHz pilot, the output signal of the second phase detector () is coupled to the loop filter ().