The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 20, 2005
Filed:
Sep. 19, 2002
Chul Hong Park, San Jose, CA (US);
Chul Hong Park, San Jose, CA (US);
Agilent Technologies, Inc., Palo Alto, CA (US);
Abstract
A passive interface circuit for coupling an output signal from a power amplifier to a load is disclosed. The interface presents an impedance to the power amplifier that increases as the power level in the output signal decreases. In one embodiment, the interface circuit includes a fixed network and a capacitor having a capacitance that varies with the potential across the capacitor. The fixed network couples the output signal to the load. The capacitor is connected in parallel with the load and has a capacitance that increases in response to an increase in potential across the capacitor. The capacitor is preferably a MEM capacitor having plates that move with respect to one another in response to changes in the average potential difference between the plates.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile