The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 20, 2005
Filed:
Nov. 07, 2003
David M. Boulin, Lebanon, NJ (US);
Reginald C. Farrow, Somerset, NJ (US);
Isik C. Kizilyalli, Millburn, NJ (US);
Nace Layadi, Singapore, SG;
Masis Mkrtchyan, Gillette, NJ (US);
David M. Boulin, Lebanon, NJ (US);
Reginald C. Farrow, Somerset, NJ (US);
Isik C. Kizilyalli, Millburn, NJ (US);
Nace Layadi, Singapore, SG;
Masis Mkrtchyan, Gillette, NJ (US);
Agere Systems Inc., Allentown, PA (US);
Abstract
A multi-layered semiconductor structure having an alignment feature for aligning a lithography mask and that may be used in connection with a SCALPEL tool. The present invention is particularly well-suited for sub-micron CMOS technology devices and circuits, but is not limited thereto. The present invention advantageously permits use of an electron beam source for both alignment and exposure of a lithography mask on a semiconductor wafer. The present invention also advantageously enables the formation of an alignment feature early (i.e., zero-level) in the semiconductor device fabrication process.