The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 2005

Filed:

Sep. 24, 2001
Applicants:

Masaki Kurasawa, Kawasaki, JP;

Kazuaki Kurihara, Kawasaki, JP;

Kenji Maruyama, Kawasaki, JP;

Inventors:

Masaki Kurasawa, Kawasaki, JP;

Kazuaki Kurihara, Kawasaki, JP;

Kenji Maruyama, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L027/108 ;
U.S. Cl.
CPC ...
Abstract

The semiconductor device comprises: a memory cell transistor formed on a semiconductor substrate; insulation filmscovering the memory cell transistor; a buffer structureformed on the insulation film; and a capacitor including a lower electrodeformed on the buffer structureand electrically connected to the source/drain diffused layer; a capacitor dielectric filmformed on the lower electrode, and formed of a perovskite ferroelectric material having a smaller thermal expansion coefficient than that of the buffer structureand having a crystal oriented substantially perpendicular to a surface of the lower electrode. The buffer structure for mitigating the influence of the stress from the substrate is formed below the lower electrode, whereby a polarization direction of the capacitor dielectric film can be made parallel with a direction of an electric field applied between the upper electrode and the lower electrode. An intrinsic polarization of the ferroelectric film can be utilized as it is.


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