The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 13, 2005

Filed:

Sep. 09, 2003
Applicants:

Min Yong Lee, Seoul, KR;

Yong Seok Eun, Kyoungki-do, KR;

Inventors:

Min Yong Lee, Seoul, KR;

Yong Seok Eun, Kyoungki-do, KR;

Assignee:

Hynix Semiconductor Inc., Kyoungki-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/8242 ;
U.S. Cl.
CPC ...
Abstract

Disclosed is a method of manufacturing semiconductor devices, which can improve electrical characteristics of semiconductor devices. The method of manufacturing comprises the following steps of: forming a plurality of gates on a semiconductor substrate; forming an insulation layer on an entire surface of the semiconductor substrate to coat the plurality of gates; selectively removing the insulation layer by using a first mask pattern to form a contact hole, which exposes a source/drain junction and a conductive layer in a portion of the gates in the semiconductor substrate; removing the first mask pattern and forming a second mask pattern on the selectively removed insulation layer, the second mask pattern exposing the p+ source/drain junction in the semiconductor substrate; implanting ion into the p+ source/drain junction in the semiconductor substrate by using the second mask pattern as a mask; removing the second mask pattern and rapid thermal annealing the entire substrate in a activation temperature range of dopant which is implanted in the ion implantation step; and burying the contact hole with conductive material to form a bit line contact plug. The invention can effectively reduce bit line contact resistance but raise resistance uniformity without variation in related techniques such as etching and contact material for forming contacts.


Find Patent Forward Citations

Loading…