The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2005

Filed:

Jun. 29, 2001
Applicants:

Johnie AU, Cupertino, CA (US);

Chia Jen Chang, San Jose, CA (US);

Parinda Mekara, Sunnyvale, CA (US);

Inventors:

Johnie Au, Cupertino, CA (US);

Chia Jen Chang, San Jose, CA (US);

Parinda Mekara, Sunnyvale, CA (US);

Assignee:

Cypress Semiconductor Corp., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C007/00 ;
U.S. Cl.
CPC ...
Abstract

A state machine comprising a first input receiving a first read clock, a second input receiving a first write clock, a third input receiving a first programmable Almost Full look-ahead signal, a fourth input receiving a second read clock, a fifth input receiving a second write clock, and a sixth input receiving a second programmable Almost Full look-ahead signal is disclosed. The state machine manipulates the inputs to produce an output signal representing an Almost Full output flag that is at a first logic state when a FIFO is Almost Full and is at a second logic state when the FIFO is Not Almost Full.


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