The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2005

Filed:

Jun. 13, 2001
Applicants:

Andreas Bertz, Chemnitz/Klaffenbach, DE;

Thomas Gessner, Chemnitz, DE;

Matthias Küchler, Chemnitz, DE;

Roman Knöfler, Gersdorf, DE;

Inventors:

Andreas Bertz, Chemnitz/Klaffenbach, DE;

Thomas Gessner, Chemnitz, DE;

Matthias Küchler, Chemnitz, DE;

Roman Knöfler, Gersdorf, DE;

Assignee:

memsfab GmbH, Chemnitz, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/00 ;
U.S. Cl.
CPC ...
Abstract

The invention relates to a microstructure in a preferably electrically conductive substrate (), more specifically made of doped single crystal silicon, with at least one functional unit () and to a method of fabricating the same. In accordance with the invention, the functional unit () is mechanically and electrically separated from the substrate () on all sides by means of isolation gaps () and is connected, on at least one site, to a first structure () of an electrically conductive layer (S) that is electrically isolated from the substrate () by way of an isolation layer () and that secures the unit into position relative to the substrate (). For this purpose, the functional unit () is released from the substrate () in such a manner that the isolation gaps () are provided on all sides relative to the substrate (). The electrically conductive layer (S) is applied in such a manner that it is connected through contact fingers () for example to the functional unit () which it secures into position. The method in accordance with the invention permits to substantially facilitate the manufacturing process and to produce a microstructure with but small parasitic capacitances.


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