The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 2005
Filed:
Jul. 06, 2004
Yung-chung Chang, Shindian, TW;
You-ming Chiu, Taipei, TW;
Yung-Chung Chang, Shindian, TW;
You-Ming Chiu, Taipei, TW;
VIA Technologies, Inc., Taipei, TW;
Abstract
An implementing method for buffering devices is provided, so as to dispose the buffering devices on a chip. The chip includes a signal source root and the number X of output bonding pads, in which the number X is a positive integer. The implementing method of the present invention includes (a) implementing a buffering device for the Nlayer at a location close to the middle place between two output bonding pads, and electrically connecting each one of the output bonding pads to the corresponding one of the buffering devices for the Nlayer, respectively. (b) A buffering device for the N+1layer is implemented at a location close to the middle place between two buffering devices for the Nlayer, and each one of the buffering devices for the Nlayer is electrically connected to the corresponding one of the buffering devices for the N+1layer, respectively. Then, the number of the buffering devices for the N+1layer is judged whether or not to be 1. If it is, then the buffering device for the N+1layer is connected to the signal source root and the method goes to end. If it is not, the method goes to the step (c). In the step (c), the quantity of the parameter N is added by 1, and then the method repeatedly performs the step (b).