The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 2005
Filed:
Dec. 31, 2002
Kenichi Ushiyama, Kawasaki, JP;
Shigenori Ichinose, Kawasaki, JP;
Kouji Banno, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
After automatic cell placement, the following steps are performed before performing automatic inter-cell routing. (S) Estimated wires having Manhattan-length path are connected between same-node terminals of cells, and detected and counted is a crosstalk error that parallel-wire length is more than a predetermined value. (S) The detected error is resolved by moving cells closely spaced less than a predetermined interval apart and connected to the error-detected estimated wires; the cell movement data is stored in a storage device; and such processes are repeated N times; and the cell placement data is modified on the basis of the cell movement data corresponding to the minimum value of error-count values of all the N times. (S) If the minimum value is not 0, (S) a buffer cell is inserted in the error-detected estimated wire. (S) Obtained is the wire density of estimated wiring having Manhattan-length path, and if the density is more than a predetermined value, the design-target frame is enlarged in size, and the process returns to the automatic cell placement process.