The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 2005
Filed:
Oct. 06, 1999
Asif D. Gandhi, Summit, NJ (US);
Lei Song, Woodbridge, NJ (US);
Mathew Thomas, Scotch Plains, NJ (US);
Stanley Vitebsky, Parsippany, NJ (US);
Asif D. Gandhi, Summit, NJ (US);
Lei Song, Woodbridge, NJ (US);
Mathew Thomas, Scotch Plains, NJ (US);
Stanley Vitebsky, Parsippany, NJ (US);
Lucent Technologies, Inc., Murray Hill, NJ (US);
Abstract
A system and a method for reverse link power control in a wireless communications network generates power adjust commands for mobiles being served by a network base station in a centralized manner by considering overall system performance when an increased interference condition is detected. In one implementation, a base station power control processor adopts a modified reverse inner loop power control (RILPC) and/or a reverse outer loop power control (ROLPC) algorithm when an increased interference condition is detected. According to the modified RILPC algorithm, a percentage of power-up adjust commands which would normally be generated when E/Nmeasurements for served mobiles do not meet target E/Nlevels are converted to power down-adjust commands, thereby forcing some mobiles to reduce transmit power, at least temporarily, to constrain interference. When the increased interference condition persists, the percentage of power-up adjust commands which are converted to power-down commands may be changed. According to the modified ROLPC algorithm, the power control processor adjusts target E/Nlevels in a centralized manner based on an overall system state so that only a limited number of target E/Nlevels are allowed to increase when frame erasures occur. By preventing a percentage of target E/Nlevel increases, at least temporarily, when frame erasures occur, a percentage of power up-adjust commands are avoided. Therefore, a similar effect to that achieved by the modified RILPC is achieved. In accordance with still a further implementation of the present invention, the modified RILPC algorithm may be used in combination with the modified ROLPC algorithm to provide greater resistance to increased interference conditions.