The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 22, 2005

Filed:

Dec. 05, 2003
Applicant:

Koji Hamaguchi, Tenri, JP;

Inventor:

Koji Hamaguchi, Tenri, JP;

Assignee:

Sharp Kabushiki Kaisha, Abeno-ku, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C016/04 ;
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device comprises a plurality of memory cells, each of which is capable of storing N-level data and being reprogrammed; and a plurality of monitor cells that separately store individual data values of the N-level data by using the same scheme as that used for the memory cells. Sensing means senses whether a physical quantity of the monitor cell which corresponds to the data value stored in the monitor cell is within a preset range; verification means verifies whether the physical quantity of the memory cell which corresponds to the data value stored in the memory cell is within the preset range when the sensing means has sensed that the physical quantity of the monitor cell is out of the preset range; correction means corrects the physical quantity. Consequently, a physical quantity variation can be efficiently detected without overstressing memory cells, and correction can be implemented for not only a downward variation due to charge loss and/or the like but also a variation in an upward physical quantity variation due to charge gain and/or the like in a specified range.


Find Patent Forward Citations

Hamaguchi, Koji. (2005). Semiconductor memory device and method for correcting memory cell data (U.S. Patent No. 6967867). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6967867

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