The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 2005
Filed:
Dec. 17, 2002
Frederic Roger, Munich, DE;
Frederic Roger, Munich, DE;
Xignal Technologies AG, Unterhaching, DE;
Abstract
The invention pertains to a circuit arrangement (comparator) for the discrete-time comparison of input signals (ip, vrefp) and for making available a pair of complementary output levels (vdd, vss) which corresponds to the result of the comparison on a line pair (P, N), wherein said circuit arrangement comprises a reset circuit () for balancing the line potentials during a reset phase, an input circuit () for generating a potential difference on the line pair (P, N) in accordance with an input signal difference, a first bistable flip-flop () for amplifying the generated potential difference and a second bistable flip-flop () that is connected by means of a connecting circuit () and serves for additionally amplifying the generated potential difference to the desired complementary output levels. According to the invention, a third bistable flip-flop () is provided that, when connecting the second flip-flop () parallel to the first flip-flop (), amplifies the generated potential difference and thusly reduces the comparison time without significantly impairing the current consumption.