The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2005

Filed:

Oct. 07, 2002
Applicants:

Mukund Sivaraman, Mountain View, CA (US);

Shail Aditya Gupta, Sunnyvale, CA (US);

Inventors:

Mukund Sivaraman, Mountain View, CA (US);

Shail Aditya Gupta, Sunnyvale, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F017/50 ;
U.S. Cl.
CPC ...
Abstract

A method of considering circuit timing requirements during the circuit design process, comprising receiving a clock cycle-time constraint; receiving delay characteristics of hardware resources from a macrocell library; receiving an operation, an alternative clock cycle associated with said operation and an alternative hardware resource associated with said operation; and determining validity of the received alternative with respect to timing constraints using a hardware structural representation of the program graph.


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