The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2005

Filed:

Nov. 19, 2001
Applicants:

Manfred Bartz, Snohomish, WA (US);

Marat Zhaksilikov, Snohomish, WA (US);

Steve Roe, Woodinville, WA (US);

Kenneth Y. Ogami, Bothell, WA (US);

Matthew A. Pleis, Carnation, WA (US);

Douglas H. Anderson, Edmund, WA (US);

Inventors:

Manfred Bartz, Snohomish, WA (US);

Marat Zhaksilikov, Snohomish, WA (US);

Steve Roe, Woodinville, WA (US);

Kenneth Y. Ogami, Bothell, WA (US);

Matthew A. Pleis, Carnation, WA (US);

Douglas H. Anderson, Edmund, WA (US);

Assignee:

Cypress Semiconductor Corp., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F017/50 ;
U.S. Cl.
CPC ...
Abstract

A method to facilitate circuit design. First, a schematic and data sheet for a selected module may be displayed. Next, in response to a request for a position for the module among available resources (e.g., programmable system blocks), a potential position for the module is computed. The position is displayed on a graphical user interface by mapping the module to one or more programmable system blocks. Additional user modules may then be selected and placed. After allowing the user to configure the circuit by selecting circuit parameters and pin-outs, various items are automatically generated to facilitate programming the target device. For example, application programming interfaces (APIs) for programming an operation of the modules, source code for realizing the modules in the resources, an interrupt vector table, and a data sheet for the circuit may be automatically generated.


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