The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2005

Filed:

Nov. 27, 2001
Applicants:

David M. Pini, Mountain View, CA (US);

Yuefei GE, San Jose, CA (US);

Anup S. Tirumala, San Jose, CA (US);

Inventors:

David M. Pini, Mountain View, CA (US);

Yuefei Ge, San Jose, CA (US);

Anup S. Tirumala, San Jose, CA (US);

Assignee:

Sun Mirosystems, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F009/312 ;
U.S. Cl.
CPC ...
Abstract

A method for reducing signed load latency in a microprocessor has been developed. The method includes transferring a part of data to an aligner via a bypass, and generating a sign bit from the part of the data. The sign bit is transferred to the aligner along the bypass, and the data is separately transferred to the aligner along a data path.


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