The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2005

Filed:

Sep. 28, 2001
Applicant:

Klaus Strohmayer, Graz, AT;

Inventor:

Klaus Strohmayer, Graz, AT;

Assignee:

Infineon Technologies AG, München, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03D003/24 ;
U.S. Cl.
CPC ...
Abstract

A digital phase-locked loop is provided having a minimal transient recovery time for emitting an output clock signal which is synchronous with a reference clock signal in a normal operating state of the digital phase-locked loop. The phase-locked loop can include a phase detector for identifying a phase deviation between the reference clock signal and a feedback clock signal. Further, the phase-locked loop can include a resettable counter, which generates a digital phase deviation signal corresponding to the identified phase deviation. The phase-locked loop can also include a resettable digital filter for filtering the digital phase deviation signal. Further, the phase-locked loop can include an oscillator circuit for generating the output clock signal as a function of a filtered digital phase deviation signal. The phase-locked loop can also include a resettable feedback frequency divider which divides the output clock signal for generating the feedback clock signal.


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