Image sensor adc and cds per column

Abstract

A solid state imager includes an arrangement for converting analog pixel values to digital form on an arrayed per-column basis. An N-bit counter supplies an N-bit DAC to produce an analog ramp output providing a ramp signal with a level that varies corresponding to the contents of the counter. Latches or equivalent digital storage elements are each associated with a respective column. A counter bus connects the counter to latch inputs of said latches, and comparators associated the columns gate the latches when the analog ramp equals the pixel value for that column. The contents of the latch elements are transferred sequentially to a video output bus to produce the digital video signal. There can be additionally black-level readout latch elements, for storing a digital value that corresponds to the dark or black video level, and a subtraction element subtracts the black level value from the pixel value to reduce fixed pattern noise. An additional array of buffer latches can be employed.