The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 15, 2005
Filed:
Feb. 18, 2004
Neil Nghia Tran, Milpitas, CA (US);
Nima Gilanpour, Mountain View, CA (US);
Myron W. Wong, Fremont, CA (US);
Weiying Ding, Cupertino, CA (US);
Neil Nghia Tran, Milpitas, CA (US);
Nima Gilanpour, Mountain View, CA (US);
Myron W. Wong, Fremont, CA (US);
Weiying Ding, Cupertino, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
The invention provides a high-speed buffer that may used at the input of an integrated circuit, such as an input buffer. This buffer may be configured for use as a standard buffer with a single switching threshold, such as a TTL-to-CMOS buffer, or used as a Schmitt trigger with hysteresis, which as at least two switching thresholds. The integrated circuit may be a programmable logic device (PLD) or field programmable gate array (FPGA), but in other embodiments, the integrated circuit may be other types of devices such a microprocessors, ASICs, or memories.