The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 15, 2005
Filed:
Jan. 28, 2003
Jong-myeong Lee, Kyungki-do, KR;
Hyeon-deok Lee, Seoul, KR;
In-sun Park, Kyungki-do, KR;
Ju-bum Lee, Kyungki-do, KR;
Jong-myeong Lee, Kyungki-do, KR;
Hyeon-deok Lee, Seoul, KR;
In-sun Park, Kyungki-do, KR;
Ju-bum Lee, Kyungki-do, KR;
Samsung Electronics Co., Ltd., Kyungki-Do, KR;
Abstract
Methods of forming an integrated circuit device can include forming an interlevel dielectric film on an integrated circuit substrate including a conductive portion thereof. The interlevel dielectric film includes a contact hole therein exposing a portion of the conductive portion of the integrated circuit substrate, and the dielectric film includes a trench therein communicating with the contact hole wherein the trench is in a surface of the interlevel dielectric film opposite the integrated circuit substrate. A first metal layer is formed in the contact hole preferentially with respect to formation of the first metal layer on a surface of the interlevel dielectric film opposite the integrated circuit substrate. After preferentially forming the first metal layer in the contact hole, a second metal layer is formed on the surface of the interlevel dielectric film opposite the integrated circuit substrate.