The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2005
Filed:
Nov. 21, 2001
Applicant:
Reiner Bidenbach, Vörstetten, DE;
Inventor:
Reiner Bidenbach, Vörstetten, DE;
Assignee:
Micronas GmbH, Freiburg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L007/06 ;
U.S. Cl.
CPC ...
Abstract
A phase-locked loop with a delay element (DLL) is described which is essentially characterized in that the delay element () has a chain of a number n delay units (), the outputs () of which are fed to a locking monitoring circuit () which determines whether the delay time Tof the delay element () lies within a range a*T<T<b*T, where 0.5<a<1 and 1<b<2, and wherein the locking monitoring circuit () performs a correction of this delay time when this condition is not met.