The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2005

Filed:

Mar. 31, 2004
Applicants:

Chung J. Lee, Fremont, CA (US);

Atul Kumar, Santa Clara, CA (US);

Inventors:

Chung J. Lee, Fremont, CA (US);

Atul Kumar, Santa Clara, CA (US);

Assignee:

Dielectric Systems, Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/4763 ;
U.S. Cl.
CPC ...
Abstract

An integrated circuit including a composite polymer dielectric layer formed on a substrate is disclosed, wherein the composite polymer dielectric layer includes a first silane-containing layer formed on the substrate, wherein the first silane-containing layer is formed at least partially from an organosilane material, a polymer dielectric layer formed on the first silane-containing layer, and a second silane-containing layer formed on the polymer dielectric layer. In some embodiments, the first silane-containing layer and second silane-containing layer may be formed from organosilane materials having at least one unsaturated bond capable of free radical polymerization. Systems and methods for making the disclosed integrated circuits are also provided.


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