The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 08, 2005

Filed:

Jan. 18, 2002
Applicants:

Katsumichi Ueyanagi, Nagano, JP;

Kazunori Saito, Nagano, JP;

Kimihiro Ashino, Nagano, JP;

Mutsuo Nishikawa, Nagano, JP;

Katsuyuki Uematsu, Nagano, JP;

Inventors:

Katsumichi Ueyanagi, Nagano, JP;

Kazunori Saito, Nagano, JP;

Kimihiro Ashino, Nagano, JP;

Mutsuo Nishikawa, Nagano, JP;

Katsuyuki Uematsu, Nagano, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01P015/00 ;
U.S. Cl.
CPC ...
Abstract

An inexpensive, accurate, and reliable semiconductor physical quantity sensor having improved resistance to noise is provided, wherein pads that have been pulled down to ground inside a semiconductor chip are arranged closer to a ground pad, while pads and that have been pulled up to a power supply inside the chip are arranged closer to a power supply pad. Of the digital input/output pads that have undergone digital trimming to obtain a predetermined output, the pulled-down pads and the ground pad are electrically connected to a ground terminal outside the chip via internal exposed portions, wires, and a ground-connecting external wire. The pulled-up pads and the power supply pad are electrically connected to a power supply terminal outside the chip via the internal exposed portions, the wires, and a power-supply-connecting external wire. Terminals may be electrically connected together on a package or a mounting substrate.


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