The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 01, 2005
Filed:
Mar. 04, 2002
Stephen M. Douglass, Saratoga, CA (US);
Stephen M. Douglass, Saratoga, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A method for designing an integrated circuit having both fixed logic and programmable logic components. An intended set of applications for the integrated circuit is first identified. In addition, for each of the intended set of applications, the logic requirements are identified. An approximate number of configurable logic blocks and at least one fixed logic circuit are selected that, when combined to operate cooperatively, meet a substantial portion of the logic requirements and the logic functions of the intended set of applications. The method also involves designing the integrated circuit with the approximate number of configurable logic blocks arranged and interconnected to form a fabric that surrounds an opening, and inserting the at least one fixed logic circuit into the opening in the fabric. In addition, the method involves adding logic to the integrated circuit that interfaces the at least one fixed logic circuit to the fabric and input/output circuitry.