The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 01, 2005

Filed:

May. 18, 2001
Applicants:

Bahram Ghaderi, Cupertino, CA (US);

Vincent Tso, Milpitas, CA (US);

Sunil Jaggia, Los Altos, CA (US);

Johnny Lee, Santa Clara, CA (US);

Inventors:

Bahram Ghaderi, Cupertino, CA (US);

Vincent Tso, Milpitas, CA (US);

Sunil Jaggia, Los Altos, CA (US);

Johnny Lee, Santa Clara, CA (US);

Assignee:

Exar Corporation, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K017/00 ; H03K003/00 ;
U.S. Cl.
CPC ...
Abstract

Method and circuitry for selecting phases while avoiding glitches in the output signal during phase switching. An integrated circuit having a plurality of input terminals coupled to receive a respective plurality of clock signals having different phases, and a plurality of control terminals coupled to receive a respective plurality of phase selection signals. The circuit is configured to output a first selected clock signal from the plurality of clock signals in response to a first combination of the phase selection signals, and further configured to switch from the first selected clock signal to a second selected clock signal in response to a second combination of the phase selection signal. The circuit disengages the first clock signal after the second phases selection signal is engaged.


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