The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 25, 2005
Filed:
Aug. 16, 2004
Hitoshi Shibue, Tokyo, JP;
Hitoshi Shibue, Tokyo, JP;
Sony Corporation, Tokyo, JP;
Abstract
The present invention provides a semiconductor device including a first semiconductor element to be bonded to a wiring board in a flip-chip bonding manner, a resin peripheral wall provided on the wiring board in such a manner as to surround the first semiconductor element, a sealing resin poured so as to fill a space surrounded by the resin peripheral wall and then hardened, and a second semiconductor element provided in such a manner that a back surface thereof is fixed on an upper surface of the sealing resin and a electrode provided on a front surface thereof is connected to a segment of wiring on the wiring board by means of a bonding wire, and provides a method of fabricating the semiconductor device. With this configuration, since semiconductor elements of arbitrary outer sizes can be stacked to each other without any limitation by the outer sizes of the semiconductor elements, even in a combination of any outer shapes of semiconductor elements vertically stacked to each other, the semiconductor elements can be mounted at a high density.