The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 18, 2005

Filed:

Mar. 06, 2002
Applicants:

Wolfgang Ernst, München, DE;

Justus Kuhn, München, DE;

Jens Luepke, München, DE;

Peter Poechmüller, Colchester, VT (US);

Gunnar Krause, München, DE;

Jochen Mueller, München, DE;

Michael Schittenhelm, Poing, DE;

Inventors:

Wolfgang Ernst, München, DE;

Justus Kuhn, München, DE;

Jens Luepke, München, DE;

Peter Poechmüller, Colchester, VT (US);

Gunnar Krause, München, DE;

Jochen Mueller, München, DE;

Michael Schittenhelm, Poing, DE;

Assignee:

Infineon Technologies AG, München, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R031/28 ; G06F011/00 ; G06F012/00 ; G06F012/02 ; G06F012/04 ;
U.S. Cl.
CPC ...
Abstract

An address generator is provided for generating addresses for testing an addressable circuit. The address generator can include a base address register for buffer-storing a base address. The base address register can be assigned an associated offset register group having a plurality of offset registers for buffer-storing relative address values. Further, the address generator can include a first multiplexer circuit which is dependent on a base register selection control signal, switches through an address buffer-stored in the base address register to a first input of an addition circuit and to an address bus, which is connected to the circuit to be tested. A second multiplexer circuit can be dependent on the base register selection control signal, through-connects the offset register group associated with the through-connected base address register to a third multiplexer circuit, which is dependent on an offset register selection control signal.


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