The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2005
Filed:
Jun. 29, 2001
Yoichi Hariguchi, Menlo Park, CA (US);
Thomas A. Herbert, San Jose, CA (US);
Ryan T. Herbst, Redwood City, CA (US);
Yoichi Hariguchi, Menlo Park, CA (US);
Thomas A. Herbert, San Jose, CA (US);
Ryan T. Herbst, Redwood City, CA (US);
Mayan Networks Corporation, San Jose, CA (US);
Abstract
A routing table circuit for a router has one or more input ports and output ports for message communication. In the routing table circuit, one or more routing table memories store a plurality of routing table arrays. The routing table arrays are arranged hierarchically in levels, and each routing table array is associated with a predetermined subset of prefixes. Each routing table array has entries. The entries include a block default route pointer field to store a block default route pointer, if any, and a routing field. The route engine may access any level of table array by using a next level route pointer stored in the routing field. Using the block default route and the routing field, the present invention further reduces the number of memory accesses and the update cost for route insertion and deletion by identifying and skipping elements that do not require route updating.