The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2005
Filed:
Mar. 10, 2004
Reed W. Adams, Plano, TX (US);
Reed W. Adams, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A clamp for a FET switch utilizes a surge detector to turn off one of two bias circuits for the FET. The first biasing circuit provides the current necessary for high speed switching. The second biasing circuit provides a lower biasing current. A resistor or other device is used to allow the measurement of BVdss on the integrated circuit where the surge detector is connected from a terminal of the conductive path of the FET to the gate thereof. The switching circuit allows the surge detector to turn on the FET to act as a self-clamp when there is a spike in the voltage applied to the FET, such as when turning off an inductive load.