The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 11, 2005
Filed:
Apr. 30, 2004
Kuo-chun Hsu, Hsinchu, TW;
Ming-dou Ker, Hsinchu, TW;
Kuo-Chun Hsu, Hsinchu, TW;
Ming-Dou Ker, Hsinchu, TW;
ADMtek Incorporated, Hsinchu, TW;
Abstract
A power-rail ESD clamp circuit for mixed-voltage I/O buffer is proposed. The power-rail ESD clamp circuit comprises an ESD detection circuit and an ESD protection device. Under normal operating condition, the ESD detection circuit will not trigger the ESD protection device, and therefore the component used in the circuit will not have the gate-oxide reliability issue and also will not generate undesirable leakage current. Under ESD-zapping conditions, the ESD detection circuit will provide some trigger voltage or current to bias the ESD protection device. The ESD protection device can be triggered on quickly to discharge the ESD energy efficiently.