The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2005

Filed:

May. 06, 2002
Applicants:

Michel Marcel Jose Decre, Eindhoven, NL;

Andreas Hubertus Montree, Leuven, BE;

Jacobus Bernardus Giesbers, Eindhoven, NL;

Gerwin Hermanus Gelinck, Eindhoven, NL;

Martin Hillebrand Blees, Eindhoven, NL;

Inventors:

Michel Marcel Jose Decre, Eindhoven, NL;

Andreas Hubertus Montree, Leuven, BE;

Jacobus Bernardus Giesbers, Eindhoven, NL;

Gerwin Hermanus Gelinck, Eindhoven, NL;

Martin Hillebrand Blees, Eindhoven, NL;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L021/31 ; H01L021/311 ;
U.S. Cl.
CPC ...
Abstract

A vertical interconnect () in an electronic device () is manufactured non-photolithographically. This is done by modifying a surface () of either a metal layer () or an intermediate layer of an electrically insulating material (), and subsequently depositing a composition with a first and a second polymer. Phase separation of the two polymers will lead to a first () and a second sub-layer (), of which the first sub-layer () is removed. An upper layer () of electrically conducting material can be deposited then or after a further etching step. This results in the vertical interconnect ().


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