The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2005

Filed:

Feb. 23, 2001
Applicants:

Ryan J. Hensley, Dallas, TX (US);

Jaideep Dastidar, Houston, TX (US);

Timothy K. Waldrop, Austin, TX (US);

Inventors:

Ryan J. Hensley, Dallas, TX (US);

Jaideep Dastidar, Houston, TX (US);

Timothy K. Waldrop, Austin, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F013/10 ; G06F013/92 ;
U.S. Cl.
CPC ...
Abstract

A technique is disclosed for facilitating data processing in a computer system. The technique utilizes logic to implement a dual mode design for PCI/PCI-X computer systems that enables optimal efficiency in regardless of which mode the system is operating in. The technique involves the implementation of two sets of transmitting and receiving elements, one tuned to PCI protocol timing and the other to PCI-X protocol. Therefore, allowing the system to process both PCI and PCI-X transactions without adversely affecting the other functional mode. The technique also enables an operator to adjust the clock timing separately for each protocol without having a detrimental affect on the other operating protocol.


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