The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 27, 2005

Filed:

Oct. 15, 2003
Applicants:

Marefusa Kurumada, Mukou, JP;

Hironori Akamatsu, Hirakata, JP;

Inventors:

Marefusa Kurumada, Mukou, JP;

Hironori Akamatsu, Hirakata, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C007/02 ;
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device capable of enhancing a production yield is provided. A dummy control circuit activates a first dummy column including a plurality of dummy cells placed at a position close to a row decoder in a row direction and a second dummy column including a plurality of dummy cells placed at a position farthest from the row decoder in a row direction with a plurality of memory cells interposed between the first dummy column and the second dummy column, through first and second dummy word lines. A dummy column selector selects either one of a signal on a first dummy bit line connected to the first dummy column and a signal on a second dummy bit line connected to the second dummy column, and outputs the selected signal to an amplifier control circuit. The amplifier control circuit generates an amplifier startup signal with respect to an amplifier circuit based on a signal from the dummy column selector.


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