The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 27, 2005
Filed:
Dec. 02, 2003
Applicants:
Robert P. Jurgilewicz, Pepperell, MA (US);
Victor F. Fleury, North Andover, MA (US);
Roger Zemke, Londonderry, NH (US);
Inventors:
Robert P. Jurgilewicz, Pepperell, MA (US);
Victor F. Fleury, North Andover, MA (US);
Roger Zemke, Londonderry, NH (US);
Assignee:
Linear Technology Corporation, Milpitas, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H03L007/00 ; H03K005/22 ;
U.S. Cl.
CPC ...
Abstract
A low voltage pull-down circuit for maintaining a node at a logic LOW voltage is provided. When a logic LOW is desired, the circuit provides a low-impedance path from the node to ground. The node may be easily pulled-up to a logic HIGH voltage, for example, by simply removing the low-impedance path and allowing a voltage source to reach the node through a resistor or transistor.